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» The Range Constraint: Algorithms and Implementation
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ITC
2002
IEEE
81views Hardware» more  ITC 2002»
15 years 9 months ago
Design Rewiring Using ATPG
—Logic optimization is the step of the very large scale integration (VLSI) design cycle where the designer performs modifications on a design to satisfy different constraints suc...
Andreas G. Veneris, Magdy S. Abadir, Mandana Amiri
FPL
2001
Springer
107views Hardware» more  FPL 2001»
15 years 8 months ago
Gambit: A Tool for the Simultaneous Placement and Detailed Routing of Gate-Arrays
In this paper we present a new method of integrating the placement and routing stages in the physical design of channel-based architectures, and present the first implementation o...
John Karro, James P. Cohoon
CAV
1998
Springer
138views Hardware» more  CAV 1998»
15 years 8 months ago
Model Checking for a First-Order Temporal Logic Using Multiway Decision Graphs
bstract description of state machines (ASMs), in which data and data operations are d using abstract sort and uninterpreted function symbols. ASMs are suitable for describing Regis...
Ying Xu, Eduard Cerny, Xiaoyu Song, Francisco Core...
ESORICS
2006
Springer
15 years 7 months ago
A Formal Model of Access Control for Mobile Interactive Devices
Abstract. This paper presents an access control model for programming applications in which the access control to resources can employ user interaction to obtain the necessary perm...
Frédéric Besson, Guillaume Dufay, Th...
EUC
2006
Springer
15 years 7 months ago
Custom Instruction Generation Using Temporal Partitioning Techniques for a Reconfigurable Functional Unit
Extracting appropriate custom instructions is an important phase for implementing an application on an extensible processor with a reconfigurable functional unit (RFU). Custom inst...
Farhad Mehdipour, Hamid Noori, Morteza Saheb Zaman...