100 search results - page 11 / 20 » The Sizing Rules Method for Analog Integrated Circuit Design |
ISCAS
1999
IEEE
13 years 12 months ago
1999
IEEE
The advent of portable and high-density devices has made power consumption a critical design concern. In this paper, we address the problem of reducing power consumption via gate-...
DAC
2007
ACM
14 years 8 months ago
2007
ACM
In this paper, we present a new multi-packing tree (MP-tree) representation for macro placement to handle mixed-size designs. Based on binary trees, the MP-tree is very efficient,...
TVLSI
2008
13 years 7 months ago
2008
Abstract--Technology scaling in the nanometer era has increased the transistor's susceptibility to process variations. The effects of such variations are having a huge impact ...
GLVLSI
2003
IEEE
14 years 25 days ago
2003
IEEE
Decreasing feature sizes and increasing package densities are making thermal issues extremely important in IC design. Uneven thermal maps and hot spots in ICs cause physical stres...
JETC
2008
13 years 6 months ago
2008
With aggressive reductions in feature sizes and the integration of multiple functionalities on the same die, bottlenecks due to I/O pin limitations have become a severe issue in to...