29082 search results - page 5691 / 5817 » The Time-Triggered Model of Computation |
CODES
2008
IEEE
14 years 4 months ago
2008
IEEE
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...
EDOC
2008
IEEE
14 years 4 months ago
2008
IEEE
Service providers as we know them nowadays are the always-on “static” web service providers, that aim at Five9 availability (99.999%). Formal, or de-facto, standards, such as ...
GLOBECOM
2008
IEEE
14 years 4 months ago
2008
IEEE
—Immediate notification of urgent but rare events and delivery of time sensitive actuation commands appear in many practical wireless sensor and actuator network applications. M...
IEEEPACT
2008
IEEE
14 years 4 months ago
2008
IEEE
Recently, chip multiprocessors (CMPs) have arisen as the de facto design for modern high-performance processors, with increasing core counts. An important property of CMPs is that...
IEEEPACT
2008
IEEE
14 years 4 months ago
2008
IEEE
The emergence of power as a first-class design constraint has fueled the proposal of a growing number of run-time power optimizations. Many of these optimizations trade-off power...