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MICRO
2005
IEEE
105views Hardware» more  MICRO 2005»
15 years 10 months ago
Incremental Commit Groups for Non-Atomic Trace Processing
We introduce techniques to support efficient non-atomic execution of very long traces on a new binary translation based, x86-64 compatible VLIW microprocessor. Incrementally comm...
Matt T. Yourst, Kanad Ghose
QSHINE
2005
IEEE
15 years 10 months ago
Adaptive Low-Complexity Erasure-Correcting Code-Based Protocols for QoS-Driven Mobile Multicast Services
—We propose an adaptive hybrid automatic repeat request–forward error correction (ARQ–FEC) erasure-correcting scheme for quality of service (QoS)-driven mobile multicast serv...
Qinghe Du, Xi Zhang
RSP
2005
IEEE
164views Control Systems» more  RSP 2005»
15 years 10 months ago
High Level Synthesis for Data-Driven Applications
Abstract— John von Neumann proposed his famous architecture in a context where hardware was very expensive and bulky. His goal was to maximize functionality with minimal hardware...
Etienne Bergeron, Xavier Saint-Mleux, Marc Feeley,...
RTAS
2005
IEEE
15 years 10 months ago
Timing Analysis for Sensor Network Nodes of the Atmega Processor Family
Low-end embedded architectures, such as sensor nodes, have become popular in diverse fields, many of which impose real-time constraints. Currently, the Atmel Atmega processor fam...
Sibin Mohan, Frank Mueller, David B. Whalley, Chri...
SBACPAD
2005
IEEE
176views Hardware» more  SBACPAD 2005»
15 years 10 months ago
Analyzing and Improving Clustering Based Sampling for Microprocessor Simulation
The time required to simulate a complete benchmark program using the cycle-accurate model of a microprocessor can be prohibitively high. One of the proposed methodologies, represe...
Yue Luo, Ajay Joshi, Aashish Phansalkar, Lizy Kuri...
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