This paper examines architectural techniques for providing concurrent error detection in self-timed VLSI pipelines. Signal pairs from Differential Cascode Voltage Switch Logic are...
The paper first presents the integration options of what we call the Timing Description Language (TDL) with MathWorks' Simulink tools. Based on the paradigm of logical executi...
In this paper we propose a framework for decentralized model-based diagnosis of complex systems modeled with qualitative constraints and whose models are distributed among their s...
--This paper presents a novel approach to evaluate the response time in networked automation systems (NAS) that use a client/server protocol. The developments introduced are derive...
Interprocessor communication times can be a significant fraction of the overall execution time required for data parallel applications. Large communication to computation ratios o...