52 search results - page 8 / 11 » The Verus Language: Representing Time Efficiently with BDDs |
ASPDAC
2007
ACM
13 years 11 months ago
2007
ACM
This paper presents a Boolean based symbolic model checking algorithm for the verification of analog/mixedsignal (AMS) circuits. The systems are modeled in VHDL-AMS, a hardware des...
IAJIT
2011
13 years 2 months ago
2011
: This article describes a multilayer model-based approach for text compression. It uses linguistic information to develop a multilayer decomposition model of the text in order to ...
PLDI
2000
ACM
13 years 11 months ago
2000
ACM
Most compiler optimizations and software productivity tools rely on information about the effects of pointer dereferences in a program. The purpose of points-to analysis is to com...
ETFA
2008
IEEE
14 years 1 months ago
2008
IEEE
Programmable Logic Controllers (PLCs) play a significant role in the control of production systems and Sequential Function Chart (SFC) is one of the main programming languages. Th...
SIGMOD
2001
ACM
14 years 7 months ago
2001
ACM
Managing multiple versions of XML documents represents an important problem, because of many applications ranging from traditional ones, such as software configuration control, to...