Sciweavers

862 search results - page 150 / 173
» The amorphous FPGA architecture
Sort
View
DATE
2004
IEEE
139views Hardware» more  DATE 2004»
14 years 6 days ago
Efficient Implementations of Mobile Video Computations on Domain-Specific Reconfigurable Arrays
Mobile video processing as defined in standards like MPEG-4 and H.263 contains a number of timeconsuming computations that cannot be efficiently executed on current hardware archi...
Sami Khawam, Sajid Baloch, Arjun Pai, Imran Ahmed,...
FPL
2006
Springer
96views Hardware» more  FPL 2006»
14 years 3 days ago
Reducing the Space Complexity of Pipelined Routing Using Modified Range Encoding
Interconnect delays are becoming an increasingly significant part of the critical path delay for circuits implemented in FPGAs. Pipelined interconnects have been proposed to addre...
Allan Carroll, Carl Ebeling
ARC
2008
Springer
126views Hardware» more  ARC 2008»
13 years 10 months ago
DNA Physical Mapping on a Reconfigurable Platform
Reconfigurable architectures enable the hardware function to be implemented by the user and, due to its characteristics, have been used in many areas, including Bioinformatics. One...
Adriano Idalgo, Nahri Moreano
WOB
2004
120views Bioinformatics» more  WOB 2004»
13 years 9 months ago
Reconfigurable Systems for Sequence Alignment and for General Dynamic Programming
ABSTRACT. Reconfigurable systolic arrays can be adapted to efficiently resolve a wide spectrum of computational problems; parallelism is naturally explored in systolic arrays and r...
Ricardo P. Jacobi, Mauricio Ayala-Rincón, L...
DT
2002
67views more  DT 2002»
13 years 8 months ago
A Retargetable Embedded In-Circuit Emulation Module for Microprocessors
This article presents an in-circuit emulation (ICE) module that can be embedded with a microprocessr core. The ICE module, based on the IEEE 1149.1 JTAG architecture, supports typ...
Ing-Jer Huang, Chung-Fu Kao, Hsin-Ming Chen, Ching...