Sciweavers

182 search results - page 21 / 37
» The cache complexity of multithreaded cache oblivious algori...
Sort
View
ISCA
2012
IEEE
232views Hardware» more  ISCA 2012»
11 years 9 months ago
RADISH: Always-on sound and complete race detection in software and hardware
Data-race freedom is a valuable safety property for multithreaded programs that helps with catching bugs, simplifying memory consistency model semantics, and verifying and enforci...
Joseph Devietti, Benjamin P. Wood, Karin Strauss, ...
CGO
2005
IEEE
14 years 1 months ago
Compiler Managed Dynamic Instruction Placement in a Low-Power Code Cache
Modern embedded microprocessors use low power on-chip memories called scratch-pad memories to store frequently executed instructions and data. Unlike traditional caches, scratch-p...
Rajiv A. Ravindran, Pracheeti D. Nagarkar, Ganesh ...
ICNP
1998
IEEE
13 years 11 months ago
On Reducing the Processing Cost of On-Demand QoS Path Computation
Quality of Service (QoS) routing algorithms have become the focus of recent research due to their potential for increasing the utilization of an Integrated Services Packet Network...
George Apostolopoulos, Satish K. Tripathi
ISHPC
2003
Springer
14 years 18 days ago
Performance Study of a Whole Genome Comparison Tool on a Hyper-Threading Multiprocessor
We developed a multithreaded parallel implementation of a sequence alignment algorithm that is able to align whole genomes with reliable output and reasonable cost. This paper pres...
Juan del Cuvillo, Xinmin Tian, Guang R. Gao, Milin...
CIKM
2006
Springer
13 years 11 months ago
Cache-oblivious nested-loop joins
We propose to adapt the newly emerged cache-oblivious model to relational query processing. Our goal is to automatically achieve an overall performance comparable to that of fine-...
Bingsheng He, Qiong Luo