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ICCAD
1997
IEEE
99views Hardware» more  ICCAD 1997»
15 years 9 months ago
High-level area and power estimation for VLSI circuits
High-level power estimation, when given only a high-level design specification such as a functional or RTL description, requires high-level estimation of the circuit average acti...
Mahadevamurty Nemani, Farid N. Najm
ISCA
1997
IEEE
120views Hardware» more  ISCA 1997»
15 years 9 months ago
Run-Time Adaptive Cache Hierarchy Management via Reference Analysis
Improvements in main memory speeds have not kept pace with increasing processor clock frequency and improved exploitation of instruction-level parallelism. Consequently, the gap b...
Teresa L. Johnson, Wen-mei W. Hwu
ISPD
1997
ACM
106views Hardware» more  ISPD 1997»
15 years 9 months ago
VLSI/PCB placement with obstacles based on sequence-pair
In a typical VLSI/PCB design, some modules are pre-placed in advance, and the other modules are requested to be placed without overlap with these pre-placed modules. The presence ...
Hiroshi Murata, Kunihiro Fujiyoshi, Mineo Kaneko
COLT
1994
Springer
15 years 9 months ago
An Optimal Parallel Algorithm for Learning DFA
: Sequential algorithms given by Angluin 1987 and Schapire 1992 learn deterministic nite automata DFA exactly from Membership and Equivalence queries. These algorithms are feasible...
José L. Balcázar, Josep Díaz,...
HT
1993
ACM
15 years 9 months ago
Searching for the Missing Link: Discovering Implicit Structure in Spatial Hypertext
Hypertexts may be implicitly structured, based on either node content or context. In this paper, we examine implicit structures that rely on the interpretation of node’s spatial...
Catherine C. Marshall, Frank M. Shipman III