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» The complexity of verifying memory coherence
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ISCA
2007
IEEE
198views Hardware» more  ISCA 2007»
14 years 1 months ago
Making the fast case common and the uncommon case simple in unbounded transactional memory
Hardware transactional memory has great potential to simplify the creation of correct and efficient multithreaded programs, allowing programmers to exploit more effectively the s...
Colin Blundell, Joe Devietti, E. Christopher Lewis...
ISCA
2012
IEEE
232views Hardware» more  ISCA 2012»
11 years 10 months ago
RADISH: Always-on sound and complete race detection in software and hardware
Data-race freedom is a valuable safety property for multithreaded programs that helps with catching bugs, simplifying memory consistency model semantics, and verifying and enforci...
Joseph Devietti, Benjamin P. Wood, Karin Strauss, ...
MIRRORBOT
2005
Springer
144views Robotics» more  MIRRORBOT 2005»
14 years 28 days ago
Combining Visual Attention, Object Recognition and Associative Information Processing in a NeuroBotic System
We have implemented a neurobiologically plausible system on a robot that integrates visual attention, object recognition, language and action processing using a coherent cortex-lik...
Rebecca Fay, Ulrich Kaufmann, Andreas Knoblauch, H...
SAS
2010
Springer
141views Formal Methods» more  SAS 2010»
13 years 5 months ago
Statically Inferring Complex Heap, Array, and Numeric Invariants
We describe Deskcheck, a parametric static analyzer that is able to establish properties of programs that manipulate dynamically allocated memory, arrays, and integers. Deskcheck c...
Bill McCloskey, Thomas W. Reps, Mooly Sagiv
IEEEPACT
2009
IEEE
13 years 5 months ago
FASTM: A Log-based Hardware Transactional Memory with Fast Abort Recovery
Abstract--Version management, one of the key design dimensions of Hardware Transactional Memory (HTM) systems, defines where and how transactional modifications are stored. Current...
Marc Lupon, Grigorios Magklis, Antonio Gonzá...