Virtual memoy page translation tables provide mappings from virtual to physical addresses. When the hardware controlled Tratmlation L.ookaside Buffers (TLBs) do not contain a tran...
This paper presents an efficient approach to generate tests for gate delay faults. Unlike other known algorithms which try to generate a 'good' delay test the presented ...
We describe a discrete time probabilitylogic for use as the representation language of a temporal knowledge base. In addition to the usual expressive power of a discrete temporal ...
Scott D. Goodwin, Howard J. Hamilton, Eric Neufeld...
This paper describes a diagnosis technique for locating design errors in circuit implementations which do not match their functional specification. The method efficiently propagat...
Andreas Kuehlmann, David Ihsin Cheng, Arvind Srini...
We consider non-Horn Deductive Data Bases (DDB) represented in a First Order language without function symbols. In this context the DDB is an incomplete description of the world. ...