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FPL
2001
Springer
136views Hardware» more  FPL 2001»
14 years 1 months ago
Building Asynchronous Circuits with JBits
Asynchronous logic design has been around for decades. However, only recently has it gained any commercial success. Research has focused on a wide variety of uses, from microproces...
Eric Keller
ASPDAC
2008
ACM
130views Hardware» more  ASPDAC 2008»
13 years 10 months ago
Architecture-level thermal behavioral characterization for multi-core microprocessors
In this paper, we investigate a new architecture-level thermal characterization problem from behavioral modeling perspective to address the emerging thermal related analysis and o...
Duo Li, Sheldon X.-D. Tan, Murli Tirumala
DAC
2007
ACM
14 years 9 months ago
Towards An Ultra-Low-Power Architecture Using Single-Electron Tunneling Transistors
Minimizing power consumption is vitally important in embedded system design; power consumption determines battery lifespan. Ultralow-power designs may even permit embedded systems...
Changyun Zhu, Zhenyu (Peter) Gu, Li Shang, Robert ...
ISCAS
2006
IEEE
119views Hardware» more  ISCAS 2006»
14 years 2 months ago
Scheduling and binding for low gate leakage nanoCMOS datapath circuit synthesis
In this paper we present two polynomial time-complexity heuristic algorithms for optimization of gate-oxide leakage (tunneling current) during behavioral synthesis through simulta...
Saraju P. Mohanty, Elias Kougianos, Ramakrishna Ve...
ICASSP
2011
IEEE
13 years 16 days ago
Data-path and memory error compensation technique for low power JPEG implementation
This paper presents a novel technique to mitigate effects of datapath and memory errors in JPEG implementations. These errors are mainly caused by voltage scaling and process vari...
Yunus Emre, Chaitali Chakrabarti