This paper studies the impact on energy efficiency and thermal behavior of design style and clock-gating style in queue and array structures. These structures are major sources of...
Yingmin Li, Mark Hempstead, Patrick Mauro, David B...
—Comprehensive performance analysis of the unordered V-BLAST algorithm with various power allocation strategies is presented, which makes use of analytical tools and resorts to M...
—A high driving capability CMOS buffer amplifier with high slew-rate, low power, and low offset voltage for high resolution TFT-LCD source drivers is proposed. Low power and high...
Our earlier work for fast evaluation of power consumption of general cores in a system-on-a-chip described techniques that involved isolating high-level instructions of a core, me...
As the operating supply voltage for commercial CMOS devices falls below 2 V, research activities are underway to develop CMOS integrated circuits that can operate at supply voltag...