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» The design of a high performance low power microprocessor
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SIPS
2008
IEEE
14 years 3 months ago
Efficient mapping of advanced signal processing algorithms on multi-processor architectures
Modern microprocessor technology is migrating from simply increasing clock speeds on a single processor to placing multiple processors on a die to increase throughput and power pe...
Bhavana B. Manjunath, Aaron S. Williams, Chaitali ...
JUCS
2010
125views more  JUCS 2010»
13 years 7 months ago
Position-based Routing Protocol for Low Power Wireless Sensor Networks
: We present a table-less position based routing scheme for low power data centric wireless sensor networks. Our proposed scheme is localized, uses greedy forwarding approach, and ...
Sajjad Ahmad Madani, Daniel Weber, Stefan Mahlknec...
VTC
2008
IEEE
123views Communications» more  VTC 2008»
14 years 3 months ago
A Low-Complexity Iterative Power Allocation Scheme for Multiuser OFDM Systems
—Multiuser orthogonal frequency division multiplexing (MU-OFDM) is a promising technique for future wide-area mobile communications, which can provide scalable high data rate tra...
Chin-Liang Wang, Chiuan-Hsu Chen
ERSA
2006
99views Hardware» more  ERSA 2006»
13 years 10 months ago
Low Power Programmable FIR Filtering IP Cores Targeting System-on-a-Reprogrammable-Chip (SoRC)
- This paper presents the design and implementation methodology of some low power programmable FIR filtering IP cores targeting SoRC and compares their performance in term of area,...
Muhammad Akhtar Khan, Abdul Hameed, Ahmet T. Erdog...
ISLPED
2005
ACM
147views Hardware» more  ISLPED 2005»
14 years 2 months ago
System level power and performance modeling of GALS point-to-point communication interfaces
Due to difficulties in distributing a single global clock signal over increasingly large chip areas, a globally asynchronous, locally synchronous design is considered a promising ...
Koushik Niyogi, Diana Marculescu