Sciweavers

1994 search results - page 81 / 399
» The design of a high performance low power microprocessor
Sort
View
ASAP
2010
IEEE
138views Hardware» more  ASAP 2010»
13 years 10 months ago
Enhancing performance of network-on-chip architectures with millimeter-wave wireless interconnects
In a traditional Network-on-Chip (NoC), latency and power dissipation increase with system size due to its inherent multi-hop communications. The performance of NoC communication ...
Sujay Deb, Amlan Ganguly, Kevin Chang, Partha Prat...
EUC
2006
Springer
14 years 16 days ago
Saving Register-File Leakage Power by Monitoring Instruction Sequence in ROB
- Modern portable or embedded systems support more and more complex applications. These applications make embedded devices require not only low powerconsumption, but also high comp...
Wann-Yun Shieh, Hsin-Dar Chen
SIPS
2007
IEEE
14 years 3 months ago
Multilevel Linc System Design for Power Efficiency Enhancement
Linear amplifier with nonlinear components (LINC) is a power amplifier (PA) linearization technique which offers both high PA efficiency and high linearity of wireless transmitter...
Kai-Yuan Jheng, Yuan-Jyue Chen, An-Yeu Wu
CASES
2007
ACM
14 years 26 days ago
Application driven embedded system design: a face recognition case study
The key to increasing performance without a commensurate increase in power consumption in modern processors lies in increasing both parallelism and core specialization. Core speci...
Karthik Ramani, Al Davis
IPPS
2003
IEEE
14 years 2 months ago
A Novel Design Technology for Next Generation Ubiquitous Computing Architecture
Modern applications for mobile computing require high performance architectures. On the other hand, there are restrictions such as storage or power consumption. The use of reconï¬...
Carsten Nitsch, Camillo Lara, Udo Kebschull