Sciweavers

1994 search results - page 98 / 399
» The design of a high performance low power microprocessor
Sort
View
COMSWARE
2007
IEEE
14 years 3 months ago
A Parallelization of ECDSA Resistant to Simple Power Analysis Attacks
The Elliptic Curve Digital Signature Algorithm admits a natural parallelization wherein the point multiplication step can be split in two parts and executed in parallel. Further pa...
Sarang Aravamuthan, Viswanatha Rao Thumparthy
CORR
2007
Springer
114views Education» more  CORR 2007»
13 years 9 months ago
High Performance Direct Gravitational N-body Simulations on Graphics Processing Units
We present the results of gravitational direct N-body simulations using the commercial graphics processing units (GPU) NVIDIA Quadro FX1400 and GeForce 8800GTX, and compare the re...
Simon Portegies Zwart, Robert G. Belleman, Peter G...
APCSAC
2006
IEEE
14 years 3 months ago
A High Performance Simulator System for a Multiprocessor System Based on a Multi-way Cluster
In the ubiquitous era, it is necessary to research the architectures of multiprocessor system with high performance and low power consumption. A simulator developed in high level l...
Arata Shinozaki, Masatoshi Shima, Minyi Guo, Mitsu...
HPCA
2008
IEEE
14 years 9 months ago
Cluster-level feedback power control for performance optimization
Power control is becoming a key challenge for effectively operating a modern data center. In addition to reducing operating costs, precisely controlling power consumption is an es...
Xiaorui Wang, Ming Chen
WCE
2007
13 years 10 months ago
VHDL Implementation of Multiplierless, High Performance DWT Filter Bank
—The JPEG 2000 image coding standard employs the biorthogonal 9/7 wavelet for lossy compression. The performance of hardware implementation of 9/7-filter bank depends on accuracy...
M. M. Aswale, R. B. Patil