517 search results - page 27 / 104 » The design of a low energy FPGA |
FPL
2009
Springer
14 years 1 months ago
2009
Springer
In this paper we present a verification platform designed for HyperTransport 3.x (HT3) applications. HyperTransport 3.x is a very low latency and high bandwidth chip-tochip interc...
FCCM
2006
IEEE
14 years 2 months ago
2006
IEEE
— Dedicated, spatially configured FPGA interconnect is efficient for applications that require high throughput connections between processing elements (PEs) but with a limited ...
DAC
2005
ACM
14 years 9 months ago
2005
ACM
Dynamic voltage scaling (DVS) is a well-known low power design technique that reduces the processor energy by slowing down the DVS processor and stretching the task execution time...
INFOCOM
2007
IEEE
14 years 2 months ago
2007
IEEE
Abstract—In this paper we address the problem of energyefficient event detection in wireless sensor networks (WSNs). Duty cycling is a fundamental approach to conserving energy i...
CORR
2010
Springer
13 years 8 months ago
2010
Springer
In recent years, Reversible Logic is becoming more and more prominent technology having its applications in Low Power CMOS, Quantum Computing, Nanotechnology, and Optical Computin...