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» The design of a low energy FPGA
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CORR
2007
Springer
116views Education» more  CORR 2007»
13 years 8 months ago
On the Low-SNR Capacity of Phase-Shift Keying with Hard-Decision Detection
1 The low-SNR capacity of M-ary PSK transmission over both the additive white Gaussian noise (AWGN) and fading channels is analyzed when hard-decision detection is employed at the ...
Mustafa Cenk Gursoy
ICRA
2007
IEEE
127views Robotics» more  ICRA 2007»
14 years 2 months ago
Design of an Autonomous Jumping Microrobot
– This paper presents the design and initial results for an autonomous jumping microrobot. At the millimeter size scale, jumping can offer numerous advantages for efficient locom...
Sarah Bergbreiter, Kristofer S. J. Pister
IJES
2007
79views more  IJES 2007»
13 years 8 months ago
Energy-aware compilation and hardware design for VLIW embedded systems
Abstract: Tomorrow’s embedded devices need to run high-resolution multimedia applications which need an enormous computational complexity with a very low energy consumption const...
José L. Ayala, Marisa López-Vallejo,...
DATE
2009
IEEE
150views Hardware» more  DATE 2009»
14 years 3 months ago
A software-supported methodology for exploring interconnection architectures targeting 3-D FPGAs
—Interconnect structures significantly contribute to the delay, power consumption, and silicon area of modern reconfigurable architectures. The demand for higher clock frequencie...
Kostas Siozios, Vasilis F. Pavlidis, Dimitrios Sou...
USENIX
2003
13 years 9 months ago
Design and Implementation of Power-Aware Virtual Memory
Despite constant improvements in fabrication technology, hardware components are consuming more power than ever. With the everincreasing demand for higher performance in highly-in...
Hai Huang, Padmanabhan Pillai, Kang G. Shin