517 search results - page 56 / 104 » The design of a low energy FPGA |
SENSYS
2003
ACM
14 years 20 days ago
2003
ACM
For many sensor network applications such as military surveillance, it is necessary to provide full sensing coverage to a security-sensitive area while at the same time minimizing...
RTSS
1998
IEEE
13 years 11 months ago
1998
IEEE
The energy efficiency of systems-on-a-chip can be much improved if one were to vary the supply voltage dynamically at run time. In this paper we describe the synthesis of systems-...
ESA
2003
Springer
14 years 19 days ago
2003
Springer
Abstract. Recently, efficient leader election algorithms for ad hoc radio networks with low time complexity and energy cost have been designed even for the no-collision detection,...
ASYNC
2000
IEEE
13 years 12 months ago
2000
IEEE
Self-timed systems often have to communicate with their environment through a clocked interface. For example, off-chip memory may require clocking and this can reduce the benefit...
ISLPED
2010
ACM
13 years 7 months ago
2010
ACM
Structured ASICs provide an exciting middle ground between FPGA and ASIC design methodologies. Compared to ASIC, structured ASIC based designs require lower non recurring engineer...