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CF
2004
ACM
14 years 1 months ago
Integrated temporal and spatial scheduling for extended operand clustered VLIW processors
Centralized register file architectures scale poorly in terms of clock rate, chip area, and power consumption and are thus not suitable for consumer electronic devices. The conse...
Rahul Nagpal, Y. N. Srikant
SIGCOMM
2010
ACM
13 years 7 months ago
LokVaani: demonstrating interactive voice in Lo3
In this work, we consider the goal of enabling effective voice communication in a TDMA, multi-hop mesh network, using low cost and low power platforms. We consider two primary usa...
Vijay Gabale, Bhaskaran Raman, Kameswari Chebrolu,...
IPPS
1998
IEEE
13 years 12 months ago
Optimizing Data Scheduling on Processor-in-Memory Arrays
In the study of PetaFlop project, Processor-In-Memory array was proposed to be a target architecture in achieving 1015 floating point operations per second computing performance. ...
Yi Tian, Edwin Hsing-Mean Sha, Chantana Chantrapor...
MOBICOM
2010
ACM
13 years 7 months ago
Bartendr: a practical approach to energy-aware cellular data scheduling
Cellular radios consume more power and suffer reduced data rate when the signal is weak. According to our measurements, the communication energy per bit can be as much as 6x highe...
Aaron Schulman, Vishnu Navda, Ramachandran Ramjee,...
NOCS
2007
IEEE
14 years 1 months ago
A Hybrid Analog-Digital Routing Network for NoC Dynamic Routing
Dynamic routing can substantially enhance the quality of service for multiprocessor communication, and can provide intelligent adaptation of faulty links during run time. Implemen...
Terrence S. T. Mak, N. Pete Sedcole, Peter Y. K. C...