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LCPC
2005
Springer
14 years 1 months ago
Compiler Control Power Saving Scheme for Multi Core Processors
With the increase of transistors integrated onto a chip, multi core processor architectures have attracted much attention to achieve high effective performance, shorten developmen...
Jun Shirako, Naoto Oshiyama, Yasutaka Wada, Hiroak...
VLDB
1992
ACM
105views Database» more  VLDB 1992»
14 years 12 days ago
Multiversion Query Locking
Multiversion two-phase locking (MV2PL) has been incorporated in some commercial transaction processing systems to support the serializable execution of queries. A drawback to this...
Paul M. Bober, Michael J. Carey
ISLPED
1995
ACM
112views Hardware» more  ISLPED 1995»
13 years 12 months ago
Ultra-low-power analog associative memory core using flash-EEPROM-based programmable capacitors
Analog techniques can lead to ultra-efficient computational systems when applied to the right applications. The problem of associative memory is well suited to array-based analog ...
Alan Kramer, Roberto Canegallo, Mauro Chinosi, D. ...
EUROSSC
2010
Springer
13 years 6 months ago
Identifying Important Action Primitives for High Level Activity Recognition
Smart homes have a user centered design that makes human activity as the most important type of context to adapt the environment according to people's needs. Sensor systems th...
Atif Manzoor, Claudia Villalonga, Alberto Calatron...
ICAS
2005
IEEE
155views Robotics» more  ICAS 2005»
14 years 2 months ago
Analyzing the Impact of Components Replication in High Available J2EE Clusters
Clustering is a well known technique that allows scalability and fault tolerance in distributed systems. In the J2EE framework, clustering can be used to improve the performance a...
Davide Rossi, Elisa Turrini