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ISCA
2008
IEEE
130views Hardware» more  ISCA 2008»
14 years 2 months ago
Corona: System Implications of Emerging Nanophotonic Technology
We expect that many-core microprocessors will push performance per chip from the 10 gigaflop to the 10 teraflop range in the coming decade. To support this increased performance...
Dana Vantrease, Robert Schreiber, Matteo Monchiero...
ISCA
2007
IEEE
149views Hardware» more  ISCA 2007»
14 years 2 months ago
An effective hybrid transactional memory system with strong isolation guarantees
We propose signature-accelerated transactional memory (SigTM), a hybrid TM system that reduces the overhead of software transactions. SigTM uses hardware signatures to track the r...
Chi Cao Minh, Martin Trautmann, JaeWoong Chung, Au...
SCP
2008
128views more  SCP 2008»
13 years 7 months ago
Mobile JikesRVM: A framework to support transparent Java thread migration
Today's complex applications must face the distribution of data and code among different network nodes. Computation in distributed contexts is demanding increasingly powerful...
Raffaele Quitadamo, Giacomo Cabri, Letizia Leonard...
PVLDB
2008
123views more  PVLDB 2008»
13 years 7 months ago
Efficient implementation of sorting on multi-core SIMD CPU architecture
Sorting a list of input numbers is one of the most fundamental problems in the field of computer science in general and high-throughput database applications in particular. Althou...
Jatin Chhugani, Anthony D. Nguyen, Victor W. Lee, ...
PPOPP
2012
ACM
12 years 3 months ago
Deterministic parallel random-number generation for dynamic-multithreading platforms
Existing concurrency platforms for dynamic multithreading do not provide repeatable parallel random-number generators. This paper proposes that a mechanism called pedigrees be bui...
Charles E. Leiserson, Tao B. Schardl, Jim Sukha