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NAACL
2001
13 years 10 months ago
SPoT: A Trainable Sentence Planner
Sentence planning is a set of inter-related but distinct tasks, one of which is sentence scoping, i.e. the choice of syntactic structure for elementary speech acts and the decisio...
Marilyn A. Walker, Owen Rambow, Monica Rogati
ISCAPDCS
2003
13 years 10 months ago
Dynamic Simultaneous Multithreaded Architecture
This paper presents the Dynamic Simultaneous Multithreaded Architecture (DSMT). DSMT efficiently executes multiple threads from a single program on a SMT processor core. To accomp...
Daniel Ortiz Arroyo, Ben Lee
SDL
2003
147views Hardware» more  SDL 2003»
13 years 10 months ago
Modelling and Evaluation of a Network on Chip Architecture Using SDL
Network on Chip (NoC) is a new paradigm for designing large and complex systems on chips (SoCs). In this paradigm, a packet switched network is provided for on-chip communication. ...
Rickard Holsmark, Magnus Högberg, Shashi Kuma...
VMV
2003
151views Visualization» more  VMV 2003»
13 years 10 months ago
Optimized Spatial Hashing for Collision Detection of Deformable Objects
We propose a new approach to collision and self– collision detection of dynamically deforming objects that consist of tetrahedrons. Tetrahedral meshes are commonly used to repre...
Matthias Teschner, Bruno Heidelberger, Matthias M&...
WSC
1997
13 years 10 months ago
Efficient Instruction Cache Simulation and Execution Profiling with a Threaded-Code Interpreter
We present an extension to an existing SPARC V8 instruction set simulator, SimICS, to support accurate profiling of branches and instruction cache misses. SimICS had previously su...
Peter S. Magnusson