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» The scaling of interconnect buffer needs
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HPCA
2003
IEEE
14 years 8 months ago
Dynamic Voltage Scaling with Links for Power Optimization of Interconnection Networks
Originally developed to connect processors and memories in multicomputers, prior research and design of interconnection networks have focused largely on performance. As these netw...
Li Shang, Li-Shiuan Peh, Niraj K. Jha
MDM
2007
Springer
137views Communications» more  MDM 2007»
14 years 1 months ago
Infrastructure for Data Processing in Large-Scale Interconnected Sensor Networks
Abstract—With the price of wireless sensor technologies diminishing rapidly we can expect large numbers of autonomous sensor networks being deployed in the near future. These sen...
Karl Aberer, Manfred Hauswirth, Ali Salehi
ISVLSI
2007
IEEE
116views VLSI» more  ISVLSI 2007»
14 years 1 months ago
Impact of Process Variations on Carbon Nanotube Bundle Interconnect for Future FPGA Architectures
As CMOS technology continues to scale, copper interconnect (CuI) will hinder the performance and reliability of Field Programmable Gate Arrays (FPGA) motivating the need for alter...
Soumya Eachempati, Narayanan Vijaykrishnan, Arthur...
IPPS
1998
IEEE
13 years 11 months ago
Distributed Dynamic Control of Circuit-Switched Banyan Networks
Circuit-switched Banyan interconnection networks can be built from simple switching elements that do not have logical processing or buffering capabilities. This paper describes a ...
Charles A. Salisbury, Rami G. Melhem
SC
2005
ACM
14 years 1 months ago
Viable opto-electronic HPC interconnect fabrics
We address the problem of how to exploit optics for ultrascale High Performance Computing interconnect fabrics. We show that for high port counts these fabrics require multistage ...
Ronald P. Luijten, Cyriel Minkenberg, B. Roe Hemen...