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BIRTHDAY
2009
Springer
14 years 2 months ago
Hybrid BDD and All-SAT Method for Model Checking
We present a new hybrid BDD and SAT-based algorithm for model checking. Our algorithm is based on backward search, where each pre-image computation consists of an efficient All-SA...
Avi Yadgar, Orna Grumberg, Assaf Schuster
VMCAI
2005
Springer
14 years 1 months ago
Minimizing Counterexample with Unit Core Extraction and Incremental SAT
Abstract. It is a hotly researching topic to eliminate irrelevant variables from counterexample, to make it easier to be understood. K Ravi proposes a two-stages counterexample min...
ShengYu Shen, Ying Qin, Sikun Li
DAC
2002
ACM
14 years 8 months ago
Solving difficult SAT instances in the presence of symmetry
Research in algorithms for Boolean satisfiability and their efficient implementations [26, 8] has recently outpaced benchmarking efforts. Most of the classic DIMACS benchmarks fro...
Fadi A. Aloul, Arathi Ramani, Igor L. Markov, Kare...
LPAR
2005
Springer
14 years 1 months ago
Deciding Separation Logic Formulae by SAT and Incremental Negative Cycle Elimination
Separation logic is a subset of the quantifier-free first order logic. It has been successfully used in the automated verification of systems that have large (or unbounded) inte...
Chao Wang, Franjo Ivancic, Malay K. Ganai, Aarti G...
ACSD
2004
IEEE
113views Hardware» more  ACSD 2004»
13 years 11 months ago
Logic Synthesis for Asynchronous Circuits Based on Petri Net Unfoldings and Incremental SAT
The behaviour of asynchronous circuits is often described by Signal Transition Graphs (STGs), which are Petri nets whose transitions are interpreted as rising and falling edges of...
Victor Khomenko, Maciej Koutny, Alexandre Yakovlev