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CLUSTER
2008
IEEE
14 years 2 months ago
Intelligent compilers
—The industry is now in agreement that the future of architecture design lies in multiple cores. As a consequence, all computer systems today, from embedded devices to petascale ...
John Cavazos
AINA
2010
IEEE
13 years 6 months ago
Compensation of Sensors Nonlinearity with Neural Networks
—This paper describes a method of linearizing the nonlinear characteristics of many sensors using an embedded neural network. The proposed method allows for complex neural networ...
Nicholas J. Cotton, Bogdan M. Wilamowski
LCTRTS
2005
Springer
14 years 1 months ago
Complementing software pipelining with software thread integration
Software pipelining is a critical optimization for producing efficient code for VLIW/EPIC and superscalar processors in highperformance embedded applications such as digital sign...
Won So, Alexander G. Dean
CASES
2006
ACM
13 years 11 months ago
Incremental elaboration for run-time reconfigurable hardware designs
We present a new technique for compiling run-time reconfigurable hardware designs. Run-time reconfigurable embedded systems can deliver promising benefits over implementations in ...
Arran Derbyshire, Tobias Becker, Wayne Luk
CODES
2010
IEEE
13 years 4 months ago
Hardware/software optimization of error detection implementation for real-time embedded systems
This paper presents an approach to system-level optimization of error detection implementation in the context of fault-tolerant realtime distributed embedded systems used for safe...
Adrian Lifa, Petru Eles, Zebo Peng, Viacheslav Izo...