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» Theorem Proving Languages for Verification
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ASPDAC
2004
ACM
94views Hardware» more  ASPDAC 2004»
14 years 13 days ago
Improving simulation-based verification by means of formal methods
The design of complex systems is largely ruled by the time needed for verification. Even though formal methods can provide higher reliability, in practice often simulation based ve...
Görschwin Fey, Rolf Drechsler
HASE
1998
IEEE
14 years 28 days ago
Verification in Concurrent Programming with Petri Nets Structural Techniques
This paper deals with verification of flow control in concurrent programs. We use Ada language model as reference. After translation of Ada programs into Petri nets (named Ada net...
Kamel Barkaoui, Jean-François Pradat-Peyre
FMCAD
2000
Springer
14 years 8 days ago
The Semantics of Verilog Using Transition System Combinators
Abstract. Since the advent of model checking it is becoming more common for languages to be given a semantics in terms of transition systems. Such semantics allow to model check pr...
Gordon J. Pace
AUSAI
2006
Springer
13 years 10 months ago
An Efficient Alternative to SVM Based Recursive Feature Elimination with Applications in Natural Language Processing and Bioinfo
The SVM based Recursive Feature Elimination (RFE-SVM) algorithm is a popular technique for feature selection, used in natural language processing and bioinformatics. Recently it wa...
Justin Bedo, Conrad Sanderson, Adam Kowalczyk
ESOP
2005
Springer
14 years 2 months ago
Analysis of an Electronic Voting Protocol in the Applied Pi Calculus
Electronic voting promises the possibility of a convenient, efficient and secure facility for recording and tallying votes in an election. Recently highlighted inadequacies of imp...
Steve Kremer, Mark Ryan