146 search results - page 19 / 30 » Thread Level Parallelism and Interactive Performance of Desk... |
ISCA
2011
IEEE
12 years 11 months ago
2011
IEEE
Optimizing the performance of a multi-core microprocessor within a power budget has recently received a lot of attention. However, most existing solutions are centralized and cann...
CLUSTER
2002
IEEE
14 years 21 days ago
2002
IEEE
In this paper, we investigate the data access patterns and file I/O behaviors of a production cosmology application that uses the adaptive mesh refinement (AMR) technique for it...
PC
2007
13 years 7 months ago
2007
The Sony–Toshiba–IBM Cell Broadband Engine (Cell/B.E.) is a heterogeneous multicore architecture that consists of a traditional microprocessor (PPE) with eight SIMD co-process...
IPPS
2005
IEEE
14 years 1 months ago
2005
IEEE
Hyperthreaded (HT) and simultaneous multithreaded (SMT) processors are now available in commodity workstations and servers. This technology is designed to increase throughput by e...
IPPS
2000
IEEE
14 years 3 days ago
2000
IEEE
Data-intensive, interactive applications are an important class of metacomputing (Grid) applications. They are characterized by large, time-varying data flows between data provid...