165 search results - page 6 / 33 » Thread-Shared Software Code Caches |
PARA
2004
Springer
14 years 3 months ago
2004
Springer
Cache optimizations typically include code transformations to increase the locality of memory accesses. An orthogonal approach is to enable for latency hiding by introducing prefet...
EUROPAR
2004
Springer
14 years 3 months ago
2004
Springer
Abstract. Fine-grained software-based distributed shared memory (SWDSM) systems typically maintain coherence with in-line checking code at load and store operations to shared memor...
CODES
2001
IEEE
14 years 2 months ago
2001
IEEE
This paper explores an application-specific customization technique for the data cache, one of the foremost area/power consuming and performance determining microarchitectural fea...
ANSS
2004
IEEE
14 years 2 months ago
2004
IEEE
To enable optimizations in memory access behavior of high performance applications, cache monitoring is a crucial process. Simulation of cache hardware is needed in order to allow...
CASES
2008
ACM
14 years 11 days ago
2008
ACM
Dynamic binary translators (DBT) have recently attracted much attention for embedded systems. The effective implementation of DBT in these systems is challenging due to tight cons...