195 search results - page 5 / 39 » Threaded Dynamic Memory Management in Many-Core Processors |
130
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ARCS
2010
Springer
15 years 8 months ago
2010
Springer
This paper describes how a superscalar in-order processor must be modified to support Simultaneous Multithreading (SMT) such that time-predictability is preserved for hard real-ti...
111
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HPCA
2003
IEEE
16 years 2 months ago
2003
IEEE
Thread-level speculation provides architectural support to aggressively run hard-to-analyze code in parallel. As speculative tasks run concurrently, they generate unsafe or specul...
131
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PDP
2010
IEEE
15 years 6 months ago
2010
IEEE
The increasing numbers of cores, shared caches and memory nodes within machines introduces a complex hardware topology. High-performance computing applications now have to carefull...
105
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ARCS
2005
Springer
15 years 7 months ago
2005
Springer
Abstract. This paper proposes a new hardware-based energy management technique for future embedded multithreaded processors with integrated Earliest Deadline First (EDF) real-time ...
143
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ISCAPDCS
2003
15 years 3 months ago
2003
This paper presents the Dynamic Simultaneous Multithreaded Architecture (DSMT). DSMT efficiently executes multiple threads from a single program on a SMT processor core. To accomp...