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OOPSLA
2009
Springer
14 years 4 months ago
A concurrent dynamic analysis framework for multicore hardware
Software has spent the bounty of Moore’s law by solving harder problems and exploiting abstractions, such as highlevel languages, virtual machine technology, binary rewritdynami...
Jungwoo Ha, Matthew Arnold, Stephen M. Blackburn, ...
ISPASS
2008
IEEE
14 years 4 months ago
An Analysis of I/O And Syscalls In Critical Sections And Their Implications For Transactional Memory
Transactional memory (TM) is a scalable and concurrent way to build atomic sections. One aspect of TM that remains unclear is how side-effecting operations – that is, those whic...
Lee Baugh, Craig B. Zilles
CODES
2007
IEEE
14 years 4 months ago
Power deregulation: eliminating off-chip voltage regulation circuitry from embedded systems
In battery-powered embedded systems, dedicated circuitry is used to convert stored energy into a form that can be directly used by processors. These power regulation devices seek ...
Seunghoon Kim, Robert P. Dick, Russ Joseph
ISPASS
2007
IEEE
14 years 4 months ago
A Comparison of Two Approaches to Parallel Simulation of Multiprocessors
— The design trend towards CMPs has made the simulation of multiprocessor systems a necessity and has also made multiprocessor systems widely available. While a serial multiproce...
Andrew Over, Bill Clarke, Peter E. Strazdins
OOPSLA
2007
Springer
14 years 4 months ago
Statistically rigorous java performance evaluation
Java performance is far from being trivial to benchmark because it is affected by various factors such as the Java application, its input, the virtual machine, the garbage collect...
Andy Georges, Dries Buytaert, Lieven Eeckhout