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EUROSYS
2010
ACM
14 years 7 months ago
A Comprehensive Scheduler for Asymmetric Multicore Systems
Symmetric-ISA (instruction set architecture) asymmetricperformance multicore processors were shown to deliver higher performance per watt and area for codes with diverse architect...
Juan Carlos Saez, Manuel Prieto Matias, Alexandra ...
ISPASS
2009
IEEE
14 years 4 months ago
Analyzing CUDA workloads using a detailed GPU simulator
Modern Graphic Processing Units (GPUs) provide sufficiently flexible programming models that understanding their performance can provide insight in designing tomorrow’s manyco...
Ali Bakhoda, George L. Yuan, Wilson W. L. Fung, He...
CODES
2006
IEEE
14 years 1 months ago
Phase guided sampling for efficient parallel application simulation
Simulating chip-multiprocessor systems (CMP) can take a long time. For single-threaded workloads, earlier work has shown the utility of phase analysis, that is identification of r...
Jeffrey Namkung, Dohyung Kim, Rajesh K. Gupta, Igo...
CASES
2005
ACM
13 years 12 months ago
Architectural support for real-time task scheduling in SMT processors
In Simultaneous Multithreaded (SMT) architectures most hardware resources are shared between threads. This provides a good cost/performance trade-off which renders these architec...
Francisco J. Cazorla, Peter M. W. Knijnenburg, Riz...
MICRO
2008
IEEE
126views Hardware» more  MICRO 2008»
13 years 10 months ago
Multicore Resource Management
UAL PRIVATE MACHINE ABSTRACTION WOULD ALLOW SOFTWARE POLICIES TO EXPLICITLY MANAGE MICROARCHITECTURE RESOURCES. VPM POLICIES, IMPLEMENTED PRIMARILY IN SOFTWARE, TRANSLATE APPLICATI...
Kyle J. Nesbit, Miquel Moretó, Francisco J....