This paper presents a revised model for the yield analysis of FPGA interconnect layers. Based on proven yield models, this work improves the predictions and assumptions of previous...
Nicola Campregher, Peter Y. K. Cheung, George A. C...
In order to extract a suitable common core information model, design representations on both system and architecture levels are analyzed. Following the specification trajectory, ...
This article presents the formal verification, using the Coq proof assistant, of a memory model for low-level imperative languages such as C and compiler intermediate languages. Be...
A nonequilibrium (NEQ) model for a complete three-phase distillation in tray columns is described. The model consists of a set of mass and energy balances for each of the three po...
A. Higler, R. Chande, R. Taylor, R. Baur, R. Krish...
Initialization and choice of adequate motion models are two important but seldom discussed problems in 3D modelbased pose (position and orientation) tracking. In this paper, we pr...