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ASPDAC
2009
ACM
120views Hardware» more  ASPDAC 2009»
14 years 3 days ago
Path selection for monitoring unexpected systematic timing effects
Nicholas Callegari, Pouria Bastani, Li-C. Wang, Sr...
EURODAC
1994
IEEE
110views VHDL» more  EURODAC 1994»
13 years 11 months ago
An experimental analysis of the effectiveness of the circular self-test path technique
Paolo Prinetto, Fulvio Corno, Matteo Sonza Reorda
ITC
1994
IEEE
82views Hardware» more  ITC 1994»
13 years 11 months ago
Making the Circular Self-Test Path Technique Effective for Real Circuits
Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
CONCUR
2004
Springer
14 years 24 days ago
Model Checking Restricted Sets of Timed Paths
In this paper, we study the complexity of model-checking formulas of three important real-time logics (MTL, MITL, and TCTL) over restricted sets of timed paths. The classes of rest...
Nicolas Markey, Jean-François Raskin