132 search results - page 7 / 27 » Three-Dimensional Cache Design Exploration Using 3DCacti |
ISCC
2008
IEEE
14 years 1 months ago
2008
IEEE
This paper explores the issues connected to the transmission of three dimensional scenes over unreliable networks such as the wireless ones. It analyzes the effect of the loss of ...
ISCA
1997
IEEE
13 years 11 months ago
1997
IEEE
The effectiveness of texture mapping in enhancing the realism of computer generated imagery has made support for real-time texture mapping a critical part of graphics pipelines. D...
TC
2011
13 years 2 months ago
2011
—Aggressive technology scaling to 45nm and below introduces serious reliability challenges to the design of microprocessors. Since a large fraction of chip area is devoted to on-...
DAC
2003
ACM
14 years 24 days ago
2003
ACM
The increasing use of microprocessor cores in embedded systems as well as mobile and portable devices creates an opportunity for customizing the cache subsystem for improved perfo...
ISCA
2009
IEEE
14 years 2 months ago
2009
IEEE
Caching techniques have been an efficient mechanism for mitigating the effects of the processor-memory speed gap. Traditional multi-level SRAM-based cache hierarchies, especially...