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FCCM
2004
IEEE
152views VLSI» more  FCCM 2004»
14 years 20 days ago
Implementing and Evaluating Stream Applications on the Dynamically Reconfigurable Processor
Dynamically Reconfigurable Processor (DRP)[1] developed by NEC Electronics is a coarse grain reconfigurable processor that selects a data path from the on-chip repository of sixte...
Noriaki Suzuki, Shunsuke Kurotaki, Masayasu Suzuki...
FMCAD
2000
Springer
14 years 16 days ago
SAT-Based Image Computation with Application in Reachability Analysis
Image computation nds wide application in VLSI CAD, such as state reachability analysis in formal veri cation and synthesis, combinational veri cation, combinational and sequential...
Aarti Gupta, Zijiang Yang, Pranav Ashar, Anubhav G...
ARC
2008
Springer
95views Hardware» more  ARC 2008»
13 years 11 months ago
The Instruction-Set Extension Problem: A Survey
Over the last years, we have witnessed the increased use of Application-Specific Instruction-Set Processors (ASIPs). These ASIPs are processors that have a customizable instruction...
Carlo Galuzzi, Koen Bertels
GLVLSI
2010
IEEE
190views VLSI» more  GLVLSI 2010»
13 years 11 months ago
A linear statistical analysis for full-chip leakage power with spatial correlation
In this paper, we present an approved linear-time algorithm for statistical leakage analysis in the present of any spatial correlation condition (strong or weak). The new algorith...
Ruijing Shen, Sheldon X.-D. Tan, Jinjun Xiong
ASPDAC
2008
ACM
101views Hardware» more  ASPDAC 2008»
13 years 11 months ago
Interconnect modeling for improved system-level design optimization
Accurate modeling of delay, power, and area of interconnections early in the design phase is crucial for effective system-level optimization. Models presently used in system-level...
Luca P. Carloni, Andrew B. Kahng, Swamy Muddu, Ale...