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SAC
2010
ACM
13 years 8 months ago
Efficient mapping and voltage islanding technique for energy minimization in NoC under design constraints
Voltage islanding technique in Network-on-Chip (NoC) can significantly reduce the computational energy consumption by scaling down the voltage levels of the processing elements (P...
Pavel Ghosh, Arunabha Sen
TCSV
2008
225views more  TCSV 2008»
13 years 7 months ago
Analysis and Efficient Architecture Design for VC-1 Overlap Smoothing and In-Loop Deblocking Filter
Abstract--In contrast to the macroblock-based in-loop deblocking filters, the filters of VC-1 perform all horizontal edges (for in-loop filtering) or vertical edges (for overlap sm...
Yen-Lin Lee, T. Q. Nguyen
VTC
2010
IEEE
140views Communications» more  VTC 2010»
13 years 6 months ago
To Cooperate or Not: A Capacity Perspective
Abstract—It is widely recognized that differential decode-andforward (DDF) cooperative transmission scheme is capable of providing a superior performance compared to classic dire...
Li Wang, Lingkun Kong, Soon Xin Ng, Lajos Hanzo
ICCAD
2009
IEEE
131views Hardware» more  ICCAD 2009»
13 years 5 months ago
Scheduling with soft constraints
In a behavioral synthesis system, a typical approach used to guide the scheduler is to impose hard constraints on the relative timing between operations considering performance, a...
Jason Cong, Bin Liu, Zhiru Zhang
ICCAD
2009
IEEE
125views Hardware» more  ICCAD 2009»
13 years 5 months ago
CROP: Fast and effective congestion refinement of placement
Modern circuits become harder to route with the ever decreasing design features. Previous routability-driven placement techniques are usually tightly coupled with the underlying p...
Yanheng Zhang, Chris Chu