This paper presents a Boolean based symbolic model checking algorithm for the verification of analog/mixedsignal (AMS) circuits. The systems are modeled in VHDL-AMS, a hardware des...
David Walter, Scott Little, Nicholas Seegmiller, C...
Probabilistic verification of continuous-time stochastic processes has received increasing attention in the model-checking community in the past five years, with a clear focus on ...
Two base algorithms are known for reachability verification over timed automata. They are called forward and backwards, and traverse the automata edges using either successors or p...
We apply the symbolic analysis principle to pushdown systems. We represent (possibly in nite) sets of con gurations of such systems by means of nite-state automata. In order to re...
Probabilistic timed automata are an extension of timed automata with discrete probability distributions. We consider model-checking algorithms for the subclasses of probabilistic t...