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» Three-valued logic in bounded model checking
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ASPDAC
2007
ACM
158views Hardware» more  ASPDAC 2007»
13 years 11 months ago
Symbolic Model Checking of Analog/Mixed-Signal Circuits
This paper presents a Boolean based symbolic model checking algorithm for the verification of analog/mixedsignal (AMS) circuits. The systems are modeled in VHDL-AMS, a hardware des...
David Walter, Scott Little, Nicholas Seegmiller, C...
IANDC
2006
117views more  IANDC 2006»
13 years 7 months ago
Statistical probabilistic model checking with a focus on time-bounded properties
Probabilistic verification of continuous-time stochastic processes has received increasing attention in the model-checking community in the past five years, with a clear focus on ...
Håkan L. S. Younes, Reid G. Simmons
FMSD
2006
140views more  FMSD 2006»
13 years 7 months ago
Dealing with practical limitations of distributed timed model checking for timed automata
Two base algorithms are known for reachability verification over timed automata. They are called forward and backwards, and traverse the automata edges using either successors or p...
Víctor A. Braberman, Alfredo Olivero, Ferna...
CONCUR
1997
Springer
13 years 11 months ago
Reachability Analysis of Pushdown Automata: Application to Model-Checking
We apply the symbolic analysis principle to pushdown systems. We represent (possibly in nite) sets of con gurations of such systems by means of nite-state automata. In order to re...
Ahmed Bouajjani, Javier Esparza, Oded Maler
CORR
2008
Springer
107views Education» more  CORR 2008»
13 years 7 months ago
Model Checking Probabilistic Timed Automata with One or Two Clocks
Probabilistic timed automata are an extension of timed automata with discrete probability distributions. We consider model-checking algorithms for the subclasses of probabilistic t...
Marcin Jurdzinski, François Laroussinie, Je...