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» Three-valued logic in bounded model checking
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GLVLSI
2009
IEEE
122views VLSI» more  GLVLSI 2009»
14 years 2 months ago
Enhancing SAT-based sequential depth computation by pruning search space
The sequential depth determines the completeness of bounded model checking in design verification. Recently, a SATbased method is proposed to compute the sequential depth of a de...
Yung-Chih Chen, Chun-Yao Wang
FASE
2006
Springer
13 years 11 months ago
Formal Simulation and Analysis of the CASH Scheduling Algorithm in Real-Time Maude
This paper describes the application of the Real-Time Maude tool to the formal specification and analysis of the CASH scheduling algorithm and its suggested modifications. The CASH...
Peter Csaba Ölveczky, Marco Caccamo
JACM
2002
163views more  JACM 2002»
13 years 7 months ago
Formal verification of standards for distance vector routing protocols
We show how to use an interactive theorem prover, HOL, together with a model checker, SPIN, to prove key properties of distance vector routing protocols. We do three case studies: ...
Karthikeyan Bhargavan, Davor Obradovic, Carl A. Gu...
DLOG
2004
13 years 8 months ago
A Uniform Tableaux-Based Approach to Concept Abduction and Contraction in ALN
We present algorithms based on truth-prefixed tableaux to solve both Concept Abduction and Contraction in ALN DL. We also analyze the computational complexity of the problems, sho...
Simona Colucci, Tommaso Di Noia, Eugenio Di Sciasc...
CSFW
1999
IEEE
13 years 11 months ago
Athena: A New Efficient Automatic Checker for Security Protocol Analysis
We propose an efficient automatic checking algorithm, Athena, for analyzing security protocols. Athena incorporates a logic that can express security properties including authenti...
Dawn Xiaodong Song