Modulo scheduling is an e cient technique for exploiting instruction level parallelism in a variety of loops, resulting in high performance code but increased register requirement...
Alexandre E. Eichenberger, Edward S. Davidson, San...
With the growing use of dynamic web content generated from relational databases, traditional caching solutions for throughput and latency improvements are ineffective. We describe...
As across-chip interconnect delays can exceed a clock cycle, wire pipelining becomes essential in high performance designs. Although it allows higher clock frequencies, it may cha...
Autonomous underwater vehicles (AUVs) have great value as platforms for sensors. While traditional AUVs have been large platforms that tend to operate alone or in very small group...
Michael R. Frater, Michael J. Ryan, Robin M. Dunba...
One of the main challenges in getting acceptance for safe object-oriented languages in hard real-time systems is to combine automatic memory management with hard real-time constra...