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» Tilings as a programming exercise
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ASPLOS
2006
ACM
14 years 1 months ago
Instruction scheduling for a tiled dataflow architecture
This paper explores hierarchical instruction scheduling for a tiled processor. Our results show that at the top level of the hierarchy, a simple profile-driven algorithm effective...
Martha Mercaldi, Steven Swanson, Andrew Petersen, ...
PLDI
1995
ACM
14 years 1 months ago
Tile Size Selection Using Cache Organization and Data Layout
When dense matrix computations are too large to fit in cache, previous research proposes tiling to reduce or eliminate capacity misses. This paper presents a new algorithm for ch...
Stephanie Coleman, Kathryn S. McKinley
IPPS
2006
IEEE
14 years 3 months ago
Hierarchically tiled arrays for parallelism and locality
Parallel programming is facilitated by constructs which, unlike the widely used SPMD paradigm, provide programmers with a global view of the code and data structures. These constr...
Jia Guo, Ganesh Bikshandi, Daniel Hoeflinger, Gheo...
ICPPW
2002
IEEE
14 years 2 months ago
Near-Optimal Loop Tiling by Means of Cache Miss Equations and Genetic Algorithms
The effectiveness of the memory hierarchy is critical for the performance of current processors. The performance of the memory hierarchy can be improved by means of program transf...
Jaume Abella, Antonio González, Josep Llosa...
ACL
1996
13 years 11 months ago
Head Automata and Bilingual Tiling: Translation with Minimal Representations
We present a language model consisting of a collection of costed bidirectional finite state automata associated with the head words of phrases. The model is suitable for increment...
Hiyan Alshawi