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FPL
2004
Springer
90views Hardware» more  FPL 2004»
14 years 3 months ago
Run-Time-Conscious Automatic Timing-Driven FPGA Layout Synthesis
Abstract. Layout tools for FPGAs can typically be run in two different modes: non-timing-driven and timing-driven. Non-timing-driven mode produces a solution quickly, without consi...
Jason Helge Anderson, Sudip Nag, Kamal Chaudhary, ...
VLSID
2005
IEEE
131views VLSI» more  VLSID 2005»
14 years 10 months ago
Efficient Space/Time Compression to Reduce Test Data Volume and Testing Time for IP Cores
Abstract-- We present two-dimensional (space/time) compression techniques that reduce test data volume and test application time for scan testing of intellectual property (IP) core...
Lei Li, Krishnendu Chakrabarty, Seiji Kajihara, Sh...
CAIP
2009
Springer
249views Image Analysis» more  CAIP 2009»
14 years 5 months ago
Real-Time Volumetric Reconstruction and Tracking of Hands in a Desktop Environment
A probabilistic framework for vision based volumetric reconstruction and marker free tracking of hand and face volumes is presented, which exclusively relies on off-the-shelf hardw...
Christoph John, Ulrich Schwanecke, Holger Regenbre...
AVSS
2006
IEEE
14 years 4 months ago
Real-Time Video Segmentation with VGA Resolution and Memory Bandwidth Reduction
This paper presents the implementation of a video segmentation unit used for embedded automated video surveillance systems. Various aspects of the underlying segmentation algorith...
Hongtu Jiang, Viktor Öwall, Håkan Ard&o...
ISQED
2003
IEEE
215views Hardware» more  ISQED 2003»
14 years 3 months ago
Low-Cost and Real-Time Super-Resolution over a Video Encoder IP
This paper addresses a low-cost and real-time solution for the implementation of super-resolution (SR) algorithms over SOC (System-On-Chip) platforms in order to achieve high-qual...
Gustavo Marrero Callicó, Antonio Nú&...