Abstract. Layout tools for FPGAs can typically be run in two different modes: non-timing-driven and timing-driven. Non-timing-driven mode produces a solution quickly, without consi...
Jason Helge Anderson, Sudip Nag, Kamal Chaudhary, ...
Abstract-- We present two-dimensional (space/time) compression techniques that reduce test data volume and test application time for scan testing of intellectual property (IP) core...
Lei Li, Krishnendu Chakrabarty, Seiji Kajihara, Sh...
A probabilistic framework for vision based volumetric reconstruction and marker free tracking of hand and face volumes is presented, which exclusively relies on off-the-shelf hardw...
Christoph John, Ulrich Schwanecke, Holger Regenbre...
This paper presents the implementation of a video segmentation unit used for embedded automated video surveillance systems. Various aspects of the underlying segmentation algorith...
This paper addresses a low-cost and real-time solution for the implementation of super-resolution (SR) algorithms over SOC (System-On-Chip) platforms in order to achieve high-qual...