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SCCC
2008
IEEE
14 years 3 months ago
Hardware Synthesis for Asynchronous Communications Mechanisms
Asynchronous data communication mechanisms (ACMs) have been extensively studied as data connectors between independently timed concurrent processes. In this work an automatic meth...
Kyller Costa Gorgônio, Jordi Cortadella
FPL
1998
Springer
106views Hardware» more  FPL 1998»
14 years 1 months ago
Acceleration of Satisfiability Algorithms by Reconfigurable Hardware
Abstract. We present different architectures to solve Boolean satisfiability problems in instance-specific hardware. A simulation of these architectures shows that for examples fro...
Marco Platzner, Giovanni De Micheli
CAIP
1997
Springer
14 years 1 months ago
A New Hardware Structure for Implementation of Soft Morphological Filters
: A new hardware structure for implementation of soft morphological filters is presented in this paper. This is based on the modification of the majority gate technique. A pipeline...
Antonios Gasteratos, Ioannis Andreadis, Phillipos ...
SC
2009
ACM
14 years 3 months ago
Implementing a high-volume, low-latency market data processing system on commodity hardware using IBM middleware
A stock market data processing system that can handle high data volumes at low latencies is critical to market makers. Such systems play a critical role in algorithmic trading, ri...
Xiaolan J. Zhang, Henrique Andrade, Bugra Gedik, R...
ASAP
2007
IEEE
136views Hardware» more  ASAP 2007»
14 years 3 months ago
0/1 Knapsack on Hardware: A Complete Solution
We present a memory efficient, practical, systolic, parallel architecture for the complete 0/1 knapsack dynamic programming problem, including backtracking. This problem was inte...
K. Nibbelink, S. Rajopadhye, R. McConnell