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DATE
2003
IEEE
82views Hardware» more  DATE 2003»
14 years 2 months ago
A Solution for Hardware Emulation of Non Volatile Memory Macrocells
More and more the system verification makes use of hardware emulation techniques that allow a speed up in simulation performance up to thousand times. Typically, a design is comp...
Alessandro Pirola
ARC
2009
Springer
175views Hardware» more  ARC 2009»
14 years 3 months ago
A Hardware Accelerated Simulation Environment for Spiking Neural Networks
Spiking Neural Networks (SNNs) model the biological functions of the human brain enabling neuro/computer scientists to investigate how arrays of neurons can be used to solve comput...
Brendan P. Glackin, Jim Harkin, T. Martin McGinnit...
JTRES
2009
ACM
14 years 3 months ago
Using hardware methods to improve time-predictable performance in real-time Java systems
This paper describes hardware methods, a lightweight and platform-independent scheme for linking real-time Java code to co-processors implemented using a hardware description lang...
Jack Whitham, Neil C. Audsley, Martin Schoeberl
RSP
2006
IEEE
102views Control Systems» more  RSP 2006»
14 years 3 months ago
Rapid Resource-Constrained Hardware Performance Estimation
In a hardware-software co-design environment, an application is partitioned into modules. Each module is then mapped either to software or to hardware. The mapping process is driv...
Basant Kumar Dwivedi, Arun Kejariwal, M. Balakrish...
ISSS
2000
IEEE
144views Hardware» more  ISSS 2000»
14 years 1 months ago
Efficient Hardware Controller Synthesis for Synchronous Dataflow Graph in System Level Design
This paper concerns automatic hardware synthesis from data flow graph (DFG) specification in system level design. In the presented design methodology, each node of a data flow gra...
Hyunuk Jung, Kangnyoung Lee, Soonhoi Ha