652 search results - page 4 / 131 » Time Management in The High Level Architecture |
IPPS
2007
IEEE
14 years 1 months ago
2007
IEEE
Over the years reconfigurable computing devices such as FPGAs have evolved from gate-level glue logic to complex reprogrammable processing architectures. However, the tools used f...
WSC
2004
13 years 8 months ago
2004
The Virtual Test Bed (VTB) is a prototype of a virtual engineering environment to study operations of current and future space vehicles, spaceports, and ranges. The HighLevel Arch...
HICSS
2007
IEEE
14 years 1 months ago
2007
IEEE
Software development is a dynamic process where engineers constantly modify and refine systems. As a consequence, system architecture evolves over time. Software architectural ev...
AGENTS
1997
Springer
13 years 11 months ago
1997
Springer
We have been developing Rogue, an architecture that integrates high-level planning with a low-level executing robotic agent. Rogue is designed as the oce gofer task planner for X...
DAC
1994
ACM
13 years 11 months ago
1994
ACM
Abstract -- This paper describes a new memory estimation technique for DSP applications written in an applicative language. Since no concept of storage is present in an applicative...