652 search results - page 56 / 131 » Time Management in The High Level Architecture |
FPGA
2000
ACM
14 years 10 days ago
2000
ACM
A considerable portion of a chip is dedicated to a cache memory in a modern microprocessor chip. However, some applications may not actively need all the cache storage, especially...
EDOC
2006
IEEE
14 years 2 months ago
2006
IEEE
At present, with the expansion of information technologies at the industry, it is vital to implant proactive, self-managed systems that ensure continuous operation and, therefore,...
ICCAD
2009
IEEE
13 years 6 months ago
2009
IEEE
Multi-core processors have become an integral part of mainstream high performance computer systems. In parallel, exponentially increasing power density and packaging costs have ne...
JNSM
2002
13 years 8 months ago
2002
Realizing high volume of data transmission in real time communication in a highly dynamic architecture like Mobile Ad hoc Networks (MANET) still remains a major point of research....
SCAM
2003
IEEE
14 years 2 months ago
2003
IEEE
We present a quantitative approach for IT portfolio management. This is an approach that CMM level 1 organizations can use to obtain a corporate wide impression of the state of th...