Abstract: This paper presents a new net-reduction methodology to facilitate the analysis of large workflow models. We propose an enhanced algorithm based on reducible subnet identi...
Abstract--Safety analysis in Systems Engineering (SE) processes, as usually implemented, rarely relies on formal methods such as model checking since such techniques, however power...
Design of embedded systems is a complex task that requires design cycles founded upon formal notation, so that the synthesis from specification to implementation can be carried ou...
Even though a thorough system specification improves the quality of the design , it is not sufficient to guarantee that a system will satisfy its reliability targets. Within this ...
This paper presents an effective approach to formally verify SystemC designs. The approach translates SystemC models into a Petri-Net based representation. The Petri-net model is ...