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SENSYS
2005
ACM
14 years 3 months ago
Estimating clock uncertainty for efficient duty-cycling in sensor networks
Radio duty cycling has received significant attention in sensor networking literature, particularly in the form of protocols for medium access control and topology management. Whi...
Saurabh Ganeriwal, Deepak Ganesan, Hohyun Shim, Vl...
ISCAS
2003
IEEE
172views Hardware» more  ISCAS 2003»
14 years 3 months ago
Efficient symbol synchronization techniques using variable FIR or IIR interpolation filters
Maximum Likelihood estimation theory can be used to develop optimal timing recovery schemes for digital communication systems. Tunable digital interpolation filters are commonly ...
Martin Makundi, Timo I. Laakso
ASYNC
2010
IEEE
230views Hardware» more  ASYNC 2010»
13 years 1 months ago
The Devolution of Synchronizers
— Synchronizers play a key role in multi-clock domain systems on chip. Traditionally, improvement of synchronization parameters with scaling has been assumed. In particular, the ...
Salomon Beer, Ran Ginosar, Michael Priel, Rostisla...
DATE
2008
IEEE
131views Hardware» more  DATE 2008»
14 years 4 months ago
Parametric Throughput Analysis of Synchronous Data Flow Graphs
Synchronous Data Flow Graphs (SDFGs) have proved to be a very successful tool for modeling, analysis and synthesis of multimedia applications targeted at both single- and multiproc...
Amir Hossein Ghamarian, Marc Geilen, Twan Basten, ...
CASES
2009
ACM
14 years 4 months ago
Tight WCRT analysis of synchronous C programs
Accurate estimation of the tick length of a synchronous program is essential for efficient and predictable implementations that are devoid of timing faults. The techniques to dete...
Partha S. Roop, Sidharta Andalam, Reinhard von Han...