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ICCD
1992
IEEE
126views Hardware» more  ICCD 1992»
13 years 11 months ago
High-Level State Machine Specification and Synthesis
Current synthesis methodologies based on hardwaredescription languages focus mainly on two distinct levels: behavior and register-transfer levels. In many practical cases, however...
Andreas Kuehlmann, Reinaldo A. Bergamaschi
DEDS
2008
127views more  DEDS 2008»
13 years 7 months ago
Diagnosability Analysis of a Class of Hierarchical State Machines
This paper addresses the problem of Fault Detection and Isolation for a particular class of discrete event dynamical systems called Hierarchical Finite State Machines (HFSMs). A ne...
Andrea Paoli, Stéphane Lafortune
ICSEA
2007
IEEE
14 years 1 months ago
Test Data Generation from UML State Machine Diagrams using GAs
Automatic test data generation helps testers to validate software against user requirements more easily. Test data can be generated from many sources; for example, experience of t...
Chartchai Doungsa-ard, Keshav P. Dahal, M. Alamgir...
ICCAD
1993
IEEE
111views Hardware» more  ICCAD 1993»
13 years 11 months ago
Unifying synchronous/asynchronous state machine synthesis
We present a design style and synthesis algorithm that encompasses both asynchronous and synchronous state machines. Our proposed design style not only supports generalized “bur...
Kenneth Y. Yun, David L. Dill
ESWS
2008
Springer
13 years 9 months ago
WSMO Choreography: From Abstract State Machines to Concurrent Transaction Logic
tract State Machines to Concurrent Transaction Logic Dumitru Roman1 , Michael Kifer2 , and Dieter Fensel1 1 STI Innsbruck, Austria 2 State University of New York at Stony Brook, US...
Dumitru Roman, Michael Kifer, Dieter Fensel