Current synthesis methodologies based on hardwaredescription languages focus mainly on two distinct levels: behavior and register-transfer levels. In many practical cases, however...
This paper addresses the problem of Fault Detection and Isolation for a particular class of discrete event dynamical systems called Hierarchical Finite State Machines (HFSMs). A ne...
Automatic test data generation helps testers to validate software against user requirements more easily. Test data can be generated from many sources; for example, experience of t...
Chartchai Doungsa-ard, Keshav P. Dahal, M. Alamgir...
We present a design style and synthesis algorithm that encompasses both asynchronous and synchronous state machines. Our proposed design style not only supports generalized “bur...
tract State Machines to Concurrent Transaction Logic Dumitru Roman1 , Michael Kifer2 , and Dieter Fensel1 1 STI Innsbruck, Austria 2 State University of New York at Stony Brook, US...