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» Timed Automata: Semantics, Algorithms and Tools
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VLSID
1998
IEEE
116views VLSI» more  VLSID 1998»
13 years 11 months ago
Synthesis of Testable RTL Designs
With several commercial tools becoming available, the high-level synthesis of applicationspeci c integrated circuits is nding wide spread acceptance in VLSI industry today. Existi...
C. P. Ravikumar, Sumit Gupta, Akshay Jajoo
TACAS
1998
Springer
81views Algorithms» more  TACAS 1998»
13 years 11 months ago
Formal Design and Analysis of a Gear Controller
In this paper, we report on an application of the validation and veri cation tool kit Uppaal in the design and analysis of a prototype gear controller, carried out in a joint proje...
Magnus Lindahl, Paul Pettersson, Wang Yi
ISSRE
2007
IEEE
13 years 9 months ago
Generating Trace-Sets for Model-based Testing
Model-checkers are powerful tools that can find individual traces through models to satisfy desired properties. These traces provide solutions to a number of problems. Instead of...
Birgitta Lindström, Paul Pettersson, Jeff Off...
CAV
2009
Springer
215views Hardware» more  CAV 2009»
14 years 8 months ago
Homer: A Higher-Order Observational Equivalence Model checkER
We present HOMER, an observational-equivalence model checker for the 3rd-order fragment of Idealized Algol (IA) augmented with iteration. It works by first translating terms of the...
David Hopkins, C.-H. Luke Ong
SIGMOD
2011
ACM
282views Database» more  SIGMOD 2011»
12 years 10 months ago
SkylineSearch: semantic ranking and result visualization for pubmed
Life sciences researchers perform scientific literature search as part of their daily activities. Many such searches are executed against PubMed, a central repository of life sci...
Julia Stoyanovich, Mayur Lodha, William Mee, Kenne...